Design & Analysis of Low Power Low Voltage Regulated Cascode Current Mirror
Sheetal Dikshit1, Ramanand Harijan2
1Ms. Sheetaal Dikshit, Department of ECE, KIIT College of Engineering Sohna Road Gurgaon, India 9013237588,
2Ramanand Harijan, Department of ECE & EEE, BM Group of Institution, Gurgaon, India.
Manuscript received on April 06, 2013. | Revised Manuscript Received on April 19, 2013. | Manuscript published on April 20, 2013. | PP: 27-37 | Volume-1, Issue-5, April 2013. | Retrieval Number: E0200041513/2013©BEIESP
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Abstract: The current mirror is core structure of all most all analog and mixed mode circuits and the performance of analog structures largely depends on their characteristics. In this paper first we study the simple current mirror, cascode current mirror and different low voltage current mirror topology and study the literature survey advantage and disadvantage. Second we study , analysis and design of convention regulated cascode current mirror, regulated cascade current mirror, wide output swing regulated cascade current mirror and wide input output swing regulated cascode current mirror and simulate Tanner EDA tool T-SPICE 0.18μm CMOS technology. Presented analysis low voltage current mirror input characteristic, output characteristics high output swing capability and wide input and wide output swing capabilities, suitable for low voltage operation and minimum power dissipation.
Keywords: low voltage current mirror , level shifted current mirror , cascode current mirror , WIOS -RCCM